So, why are we calling it "10Gbps-TB1"?
 
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So, why are we calling it "10Gbps-TB1"?  

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Yukikaze
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This is probably bugging me more than it should, but: In the implementations table, we use the following options (for Thunderbolt connections) in the Interface column:

10Gbps-TB1

16Gbps-TB2

32Gbps-TB3

Shouldn't 10Gbps be 8Gbps for TB1? Or shouldn't it be 20Gbps for TB2 and 40Gbps for TB3? Either it should list the interconnect speed (which is also less confusing to less technical users, since it matches what these interfaces advertise), or it should list the effective connection speeds, but it should not vary the two between the different TB generations.

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nando4
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The 20Gbps-TB2, 40Gbps-TB3 is Intel marketting talk. This is unattainable PCIe bandwidth since the encapsulating PCIe bandwidth is less.

So 10Gbps-TB1, 16Gbps-TB2 and 32Gbps-TB3 is the lesser of the PCIe link and TB channel link bandwidth. This work to:

1. buck the Intel 20Gbps, 40Gbps terminology drawing user attention as to why. Intel does not clearly denote that 40Gbps-TB3 is actually 22Gbps-TB3 of PCIe bandwidth. They do say that a TB3 controller takes "up to 4-lanes of PCIe 3.0 as input".

2. Infers PCIe lanes as a reference point for TB2/TB3 bandwidth. Important because:

- is often a discussion point. eg: 4-lane TB3, 2-lane TB3, GT4/GT2 OPI.
- gives a comparison point back to other direct PCIe interfaces (eg: M.2, EC) where any measured underperformance points back to the TB controller functionality. 

3. More closely approximates the H2D bandwidth ratio between these three TB interfaces. TB3 gives 2.8x TB1 H2D bandwidth, not 4x.

Please see the following link for measured interface performance:

https://egpu.io/external-gpu-implementations-table/#perf

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Yukikaze
(@yukikaze)
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I know all this, and yo are right!

Then 10Gbps-TB1 should be 8Gbps-TB1, which is the point I am making here. There is no 10Gbps of PCIe BW across TB1!

Want to output [email protected] out of an old system on the cheap? Read here.
Give your Node Pro a second Thunderbolt3 controller for reliable peripherals by re-using a TB3 dock (~50$).

"Always listen to experts. They'll tell you what can't be done, and why. Then do it."- Robert A. Heinlein, "Time Enough for Love."

 
2012 14" Lenovo Thinkpad T430s [3rd,2C,M] + RX 550 @ 10Gbps-TB1 (Atto Thunderlink) + Win10 [build link]  


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nando4
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Yukikaze, TB1 connects at x4 2.0. It is limited by the TB1 controller to 10Gbps hence why it is 10Gbps-TB1.

It has more than x2 2.0 (8Gbps) of bandwidth across it as can be seen at by the comparison of 10Gbps-TB1 and 8Gbps-M2 at:

https://egpu.io/external-gpu-implementations-table/#perf

I personally confirmed that 10Gbps-TB1 is more bandwidth than x2 2.0 when doing comparisons of my old BPlus TH05 (neutered x2 2.0 TB1 controller link) against TB1 enclosures connecting at x4 2.0. I won't point you were to find that info as you know already Smile

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goalque
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Thunderbolt carries video (DP) data as well. A single 4K display does not have influence on 22Gbps PCIe data bandwidth but two 4K displays through TB3 leaves only 8Gbps download for PCIe data.

Source:  https://sgcdn.startech.com/005329/media/sets/TB31PCIEX16_Manual/TB31PCIEX16_PCIe_Thunderbolt_3_manual.pdf

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goalque
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More detailed explanation:

http://en.community.dell.com/support-forums/laptop/f/3518/t/20017807
https://thunderbolttechnology.net/tech/faq (What are the video formats supported by Thunderbolt 3?)

"A Thunderbolt 3 port can work as a regular USB-C port, but when running in Thunderbolt mode, it can carry up to 8 lanes of DisplayPort 1.2 (i.e. two full-bandwidth outputs), and up to 4 lanes of PCIe Gen 3. Thunderbolt docks that offer USB connectivity do so by incorporating a PCIe-based USB 3.1 controller. Note that the capabilities of a given system’s Thunderbolt 3 interface will depend on how many GPU outputs and how many PCIe lanes are wired to its Thunderbolt 3 controller, although the spec mandates at least 1 full DisplayPort 1.2 output (4 lanes) and 2 PCIe Gen 3 lanes. The way this can all be carried simultaneously over just 4 USB-C lanes is that the Thunderbolt controller multiplexes the DisplayPort and PCIe signals into just a “Thunderbolt signal” before sending it out of the USB-C connector, then the device on the other end de-multiplexes it as needed. Those of you doing some quick math here may have realized that Thunderbolt 3’s maximum 40 Gbps rate is not high enough to handle both traffic types running their respective max bandwidth simultaneously. Dual 4K @ 60 Hz displays would consume ~32 Gbps all on its own, for example, and PCIe Gen 3 x4 is another 32 Gbps. Note however that Thunderbolt can carry 40 Gbps in each direction simultaneously – so for example you could theoretically use dual 4K displays (consuming 32 Gbps of only transmit bandwidth) while also receiving data from a PCIe-based capture device at its full 32 Gbps. When there simply isn’t enough bandwidth to meet demand, Thunderbolt 3 gives priority to display traffic, then PCIe."

"PCIe-based capture device at its full 32 Gbps" is not correct. It is up to 22 Gbps.

However, the question is... what happens when there is an eGPU (PCIe 3.0 x4) between the TB3 controller and 5K or dual 4K displays? Can we benefit from the 8 lanes of DP 1.2 protocol in that situation as well?

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joevt
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Posted by: goalque

However, the question is... what happens when there is an eGPU (PCIe 3.0 x4) between the TB3 controller and 5K or dual 4K displays? Can we benefit from the 8 lanes of DP 1.2 protocol in that situation as well?

I'm not sure what you mean. If your eGPU is connected to the first port of a Thunderbolt 3 controller, then the controller can still send 8 lanes of DP 1.2 over the second Thunderbolt port. If you mean that there should be more bandwidth for the first port because it is connected to an eGPU which doesn't use any of the 8 lanes of DP 1.2, then I don't think it will go over 22 Gbps anyway. It's the same with any PCIe device connected by Thunderbolt. Maybe Intel could fix the firmware to allow greater than 22 Gbps, if that is not the real limit of PCIe data over Thunderbolt because of limitations in the controller hardware.

 

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goalque
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Posted by: joevt

I'm not sure what you mean. If your eGPU is connected to the first port of a Thunderbolt 3 controller, then the controller can still send 8 lanes of DP 1.2 over the second Thunderbolt port. If you mean that there should be more bandwidth for the first port because it is connected to an eGPU which doesn't use any of the 8 lanes of DP 1.2, then I don't think it will go over 22 Gbps anyway. It's the same with any PCIe device connected by Thunderbolt. Maybe Intel could fix the firmware to allow greater than 22 Gbps, if that is not the real limit of PCIe data over Thunderbolt because of limitations in the controller hardware.

I meant the following topology:

1) TB3 MBP <-> TB3 cable <-> TB3 controller <-> direct DP interface (as with TB31PCIEX16) <-> DP cable <-> 4K display

I/O bandwidth remaining: 22Gbps (download) / 22Gbps (upload)

2) TB3 MBP <-> TB3 cable <-> TB3 controller <-> PCIe 3.0 x4 slot <-> PCIe 3.0 backplane with x16 slot <-> eGPU <-> DP cable <-> 4K display

I/O bandwidth remaining?

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joevt
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Posted by: goalque

I meant the following topology:

1) TB3 MBP <-> TB3 cable <-> TB3 controller <-> direct DP interface (as with TB31PCIEX16) <-> DP cable <-> 4K display

I/O bandwidth remaining: 22Gbps (download) / 22Gbps (upload)

2) TB3 MBP <-> TB3 cable <-> TB3 controller <-> PCIe 3.0 x4 slot <-> PCIe 3.0 backplane with x16 slot <-> eGPU <-> DP cable <-> 4K display

I/O bandwidth remaining?

1) 16 Gbps is being used by DP (for 4K) but TB3 has 40 Gbps total and gives up to 22 Gbps to PCIe I/O

2) If the computer is not sending textures or whatever to/from the graphics card, then you have a large percent of the PCIe 22 Gbps still available (upload and download) and you have the rest available for DP from your internal GPU (as in situation #1) without impacting the eGPU. Download from Thunderbolt is impacted if you're sending video output from the eGPU to your internal graphics card because the graphics buffer copy is sent using the 22 Gbps PCIe bandwidth for each frame that is copied. This is assuming the information at  https://egpu.io/thunderbolt-3-news-for-egpus/#tb3perf is correct.

 

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goalque
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Posted by: joevt

2) If the computer is not sending textures or whatever to/from the graphics card, then you have a large percent of the PCIe 22 Gbps still available (upload and download) and you have the rest available for DP from your internal GPU (as in situation #1) without impacting the eGPU.

So are you saying that when the eGPU is just displaying desktop graphics, and I am not transferring any data, the 22Gbps PCIe data part stays mostly untouched because of the DP data/PCIe data separation?

In the above situation (2), if we connect two 4K displays (DP) to the eGPU, would the remaining H2D PCIe data bandwidth be 8Gbps (40Gbps - 2 x 16Gbps) and the D2H PCIe data part (22Gbps) would not be affected?

For some reason, Startech document states 8Gbps as "download" whereas Intel graph indicates H2D direction (upload).

https://thunderbolttechnology.net/sites/default/files/Thunderbolt3_TechBrief_FINAL.pdf

Intel says that "Two links of (4 lane) DisplayPort 1.2 consume 2x (4 x 5.4 Gbps) or 43.2 Gbps", so one DP 1.2 has up to 21.6Gbps bandwidth but the actual video data rate @60Hz [4K 30bpp] is 16Gbps (as you mentioned).

https://www.amd.com/Documents/50279_AMD_FirePro_DisplayPort_1-2_WP.pdf

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